1. Technical Field
Embodiments of the present invention relate to a semiconductor integrated circuit, and more particularly, to an internal voltage generating circuit.
2. Related Art
In general, an internal voltage generating circuit generates an internal voltage that is used in a semiconductor memory apparatus. Examples of the internal voltage generating circuit include a bootstrapping voltage VPP generating circuit that generates an internal voltage higher than a supply voltage, a back bias voltage VBB generating circuit that generates an internal voltage lower than a ground voltage, and a reference voltage VREF generating circuit that generates a reference voltage, and the like.
For example, in the case of the semiconductor memory apparatus, the bootstrapping voltage VPP generating circuit is used to activate word lines. A back bias voltage VBB that is generated by the back bias voltage generating circuit is applied to an N-well where a PMOS transistor is formed and adjusts a threshold voltage Vth of the PMOS transistor.
As shown in FIG. 1, a general internal voltage generating circuit includes a first detector 100 that compares an internal voltage VINT and a reference voltage VREF, detects a result of the comparison and outputs a signal based thereon, an oscillator 200 that outputs a pulse signal in response to a signal output by the first detector 100, and a charge pump 300 that performs, when a pulse signal is applied to the charge pump 300 from the oscillator 200, a pumping operation so as to pump the internal voltage VINT.
The charge pump 300 continuously performs a pumping operation until the internal voltage VINT output by the charge pump 300 reaches a target value. Accordingly, after the internal voltage VINT reaches the target value, the charge pump 300 stops the pumping operation, and maintains the internal voltage VINT.
However, when a supply voltage VDD that drives the internal voltage generating circuit is low, a small amount of current is supplied to elements that are provided in the oscillator 200, and a cycle of the signal output by the oscillator is lengthened. As a result, it is difficult for the output signal of the oscillator 200 to be supplied to the charge pump 300 so as to stably generate the internal voltage VINT.
In recent years, as the supply voltage VDD of the semiconductor memory apparatus is lowered, the supply voltage VDD becomes unstable, which causes the internal voltage VINT to be unstable.